35.3

0
Favorite
0
copy
Copy
104
Views
35.3

Circuit Description

Graph image for 35.3

Circuit Graph

This is a two-input XOR Gate implemented using pMOSFETs. The output is passively pulled down by resistor Ropd. The output pull-down resistor should be relatively high because of the poor driving capability of pMOS transistors. Note: Vini and Vinq are the input signals. The output is at the junction of Ropd and the drain terminals of Q1 and Q2. I intend to have the two input signals to be equal in frequency but in quadrature for observing the behavior in Transient Analysis. However I cannot configure the phase of a clock source so I used a sine wave input and applied it to a zero crossing detector to produce the equivalent quadrature signal.

There are currently no comments

Creator

Radmir00070

109 Circuits

Date Created

2 years ago

Last Modified

2 years ago

Tags

  • circuit fundamentals
  • pmos xor gate
  • mos basic logic gates

Circuit Copied From