4-Bit Asynchronous 4-Bit Asynchronous ACTIVE HIGH COUNTER USING POSITIVE EDGE TRIGGERED JK FLIP FLOP

0
Favorite
3
copy
Copy
679
Views
4-Bit Asynchronous 4-Bit  Asynchronous ACTIVE HIGH COUNTER USING POSITIVE EDGE TRIGGERED  JK FLIP FLOP

Circuit Description

Graph image for 4-Bit Asynchronous 4-Bit  Asynchronous ACTIVE HIGH COUNTER USING POSITIVE EDGE TRIGGERED  JK FLIP FLOP

Circuit Graph

This 4-bit digital counter is a sequential circuit that uses JK flipflops, AND gates, and a digital clock. For each clock tick, the 4-bit output increments by one. After it reaches it's maximum value of 15 (calculated by 2^4-1), it resets to zero. Each probe measures one bit of the output, with PR1 measuring the least significant bit and PR4 measuring the most significant bit. PR5 is the clock. Expand this circuit by adding a digital to analog converter!

There are currently no comments

Profile image for Kunal206052

4-Bit Asynchronous 4-Bit Asynchronous ACTIVE HIGH COUNTER USING POSITIVE EDGE TRIGGERED JK FLIP FLOP (1)

Kunal206052
Profile image for anurhag

asynchronous counter resets at 9

anurhag
Profile image for private copy

Private Copy

Creator

Kunal206052

85 Circuits

Date Created

3 years ago

Last Modified

3 years ago

Tags

  • digital
  • counter
  • 4-bit

Circuit Copied From