JFET attenuation of 5 uV RF signal 2.0

P-channel and N-channel JFETs conduct hole or electron current, respectively, from the Source to the Drain. The N-channel JFET’s channel is doped with donor impurities, meaning that the flow of current through the channel from S to D is in the form of electrons. In a typical diagram of a P-channel JFET you would see voltage biasing [S+ D-]. To turn on a P-channel JFET, apply a positive voltage Vs to the source terminal of the transistor with no voltage applied to the gate terminal of the transistor. The easiest way to remember this is: - N-type devices need a source of negative charge connected to Source. - P-type devices need a source of positive charge connected to Source. In addition, gate control requires Vgs < 0 for the N-channel device and Vgs > 0 for the P-channel device. The JFET symbol has the gate drawn on the Source side of the symbol. (Note /here/ the gate at the top of the JFET symbol, and the direction of the gate arrow, indicating P-channel and N-gate.) Here, the PJFET is biased with +3.3Vdc, and the gate voltage, Vg, is adjusted with the pot. The drain-source voltage that causes the current limiting condition at Vg=0 is called the “pinch-off” voltage (Vp). When Vg is not zero (>0 for P-channel), pinch-off occurs at a different S-D voltage. The input here is assumed to be an antenna for a small radio operating at 100 MHz, and producing a 5 uV p-p signal at the input to this circuit. At Vg=0, maximum current flows through the JFET, and the output signal is at a minimum. At pinch-off, minimum current flows through the JFET, and the output signal is at a maximum.