This is a frequency divider using the 555 timer in monostable mode, more appropriately the 555 is operating as a nonretriggerable the inshould be between (n x Tin - Thin) to (n x Tin) where Tin is the period of the input and Thin is the input high state time interval.
This circuit demonstrates frequency division by 5, the input is a square wave signal with a period of 200 us, 5 cycles will take 1 ms. The period of the 555 output should be between 900 us and 1 ms. Using the standard resistor and capacitor values of 18 kOhms and 0.047 uF, the period is 929.426 us.
Note:
It takes a relatively long time to display the graph. In Simulation settings, Initial conditions is set to User defined. If this is set to Determine automatically, the voltages are quickly plotted but the graph is erroneous. The most noticeable is the multiple transition of the output as the timing capacitor voltage makes its first crossing of the control voltage. Subsequent cycles appear to work properly. The main cause of the anomaly is that the input signal commences at high state but the output is also initially set high. A modified circuit that circumvents this hindrance to generate the graph faster is in 555 Frequency Divider (Fast Graph Generation).
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