LAB6 NAND
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The NMOS transistor has an input from Vss (ground) and PMOS transistor has an input from Vdd. The terminal Y is output. When a high voltage (~ Vdd) is given at input terminal of the inverter, the PMOS becomes open circuit and NMOS switched OFF so the output will be pulled down to Vss.
Creator
Maangchi
6 Circuits
Date Created
3 years, 12 months ago
Last Modified
3 years, 12 months ago
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