week 10a

0
Favorite
3
copy
Copy
202
Views
week 10a

Circuit Description

Graph image for week 10a

Circuit Graph

Synchronous Counter Design a 3-bit synchronous counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation

There are currently no comments

Profile image for RA2111026010309

Exp 10b RA2111026010309

RA2111026010309
Profile image for RA2111026010338

3bit_sync_up

RA2111026010338
Profile image for RA2111026010310

week 10 A

RA2111026010310

Creator

sanchi1304

39 Circuits

Date Created

2 years ago

Last Modified

2 years ago

Tags

  • digital
  • counter

Circuit Copied From