3-bit Synchronous down counter RA1911026010087 ADE Model Exam
0
Favorite
2
Copy
525
Views
Circuit Description
Circuit Graph
Synchronous Counter
Design a 3-bit synchronous counter with the sequence below by using JK flip flops.
1 5 3 7 4 0 2 6 ...
Apply the clock pulses and observe the output.
Verify your design with output waveform simulation
Creator
sr8962
24 Circuits
Date Created
4 years ago
Last Modified
4 years ago
Tags
This circuit has no tags currently.
Circuit Copied From
Open Circuit
✕Circuit Graph
✕
There are currently no comments