Hiaroshi Rey Rosas Transistor OR Gate

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Hiaroshi Rey Rosas Transistor OR Gate

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Two-BJT implementation of Two-Input OR Gate. Vin1 and Vin2 are the input signals. The output is at the junction of Ropu and the collector of the NPN transistor. I intend to have the two input signals to be equal in frequency but in quadrature for observing the behavior in Transient Analysis. However I cannot configure the phase of a clock source so I used a sine wave input and applied it to a zero crossing detector to produce the equivalent quadrature signal. With the two input signals equal in frequency but in quadrature, the two input will be simultaneously low for only 25% of the time so the output should be a rectangular wave with 75% duty cycle. Notes: Depending on the transistor used and the voltage level of Vin2, the NPN transistor may need protection against reverse breakdown of the base-emitter junction. My objective is for this circuit to be opened and simulated in Free Subscription version of Multisim Live, no base-emitter shunt resistors are in place due to Components per circuit limitation.

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Creator

Hiaroshi99

16 Circuits

Date Created

4 years ago

Last Modified

4 years ago

Tags

  • circuit fundamentals
  • bjt basic logic gates
  • bjt logic gates
  • or gate

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