Simplified Latched Positive Edge Detector

The circuit is a latched positive edge detector but the latch is a simple Set-Reset latch with active-low asynchronous clear (nCLEAR). The output is active-high. When nCLEAR is asserted the output of three-input NAND gate U2 and the main output ACTHIOUT are kept high and low, respectively. When nCLEAR is deasserted, ACTHIOUT will go high upon the arrival of the first low-going pulse from NAND gate U2. The output remains high until nCLEAR is asserted again.