PRAC 6 Full-Adder

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PRAC 6 Full-Adder

Circuit Description

Graph image for PRAC 6 Full-Adder

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The circuit performs the function of adding three binary digits. The three digits are the augend, addend and carry input bits. Using these three input bits the circuit produces the sum and the carry output bits as its output signals. The SUM output bit will be set if the number of input bits set to 1 is odd. The CARRY output bit will be set if two or all of the input bits are 1s. A three-input XOR gate and a three-input majority voting logic circuit were used for the SUM and CARRY outputs respectively.

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Creator

user-28291

36 Circuits

Date Created

1 year, 1 month ago

Last Modified

1 year, 1 month ago

Tags

  • adder
  • majority voting
  • majority vote
  • majority voting logic
  • majority vote logic
  • carry
  • sum
  • half-adder
  • full-adder

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