Browser not supported

✕
Go back

Tier limit reached

✕

Positive edge-Triggered D-Flip-Flop using Basic Gates

0
Favorite
0
copy
Copy
75
Views
Open Circuit
Positive edge-Triggered D-Flip-Flop using Basic Gates
Social Share
Embed circuit
Embed linked image

Circuit Description

Graph image for Positive edge-Triggered D-Flip-Flop using Basic Gates

Circuit Graph

Attribution: Nolanjshettle at English Wikipedia [GFDL (http://www.gnu.org/copyleft/fdl.html) or CC BY-SA 3.0 (https://creativecommons.org/licenses/by-sa/3.0)] Positive Edge Triggered D-Flip-Flop using Basic Gates only. NAND gate is replaced by AND gate followed by NOT gate.

There are currently no comments

Creator

Profile image for cgelectron

CGElectron

51 Circuits

Date Created

1 year, 5 months ago

Last Modified

1 year, 5 months ago

Tags

  • basic logic gates
  • flip-flop

Circuit Copied From

Positive edge-Triggered D-Flip-Flop using Basic Gates

Related Circuits

Preview of D flip-flop

D flip-flop

by Sobrjery

11921
7
copy
270
Preview of Counter to 7 Segment Display with JK Flip-flops and Logic Gates

Counter to 7 Segment Display with JK Flip-flops and Logic Gates

by robo_Jeff

11080
8
copy
39
Preview of Master-Slave D Latch (Edge-Triggered D Flip-Flop) With Preset And Clear

Master-Slave D Latch (Edge-Triggered D Flip-Flop) With Preset And Clear

by GGoodwin

9559
0
copy
31

© 2025 National Instruments Corp. ALL RIGHTS RESERVED.

Hosted Services Terms Privacy Policy Export Notices Terms of Use

Circuit Graph

✕
Graph image for Positive edge-Triggered D-Flip-Flop using Basic Gates

Remove Comment

✕

Are you sure you want to remove your comment? This action cannot be undone.

Cancel Remove Comment

✕
Cancel Send

Enter Email

✕