Synchronus down counter exp10

0
Favorite
1
copy
Copy
138
Views
Synchronus down counter exp10

Circuit Description

Graph image for Synchronus down counter exp10

Circuit Graph

Synchronous Counter Design a 3-bit synchronous counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation

There are currently no comments

Profile image for vaish25

RA2111027010021(down)

vaish25

Creator

RA2011030010091

16 Circuits

Date Created

3 years ago

Last Modified

3 years ago

Tags

  • digital
  • counter

Circuit Copied From