Your browser is incompatible with Multisim Live. Use the Chrome™ browser to best experience Multisim Live.

4-bit async-down counter using negative edge triggered JK-FFs

0

Favorite

0

Copy

115

Views

4-bit async-down counter using negative edge triggered JK-FFs

Circuit Description

Desgin a synchronous BCD counter using T flip flop and verify its performance using Multisim

Comments (0)

There are currently no comments

Creator

XcodeX66

31 Circuits

Date Created

1 year, 5 months ago

Last Modified

1 year, 5 months ago

Tags

This circuit has no tags currently.

Circuit Copied From

4-bit async-down counter using postive edge triggered JK-FFs