G & H (1)

The circuit switches two two-bit input data A and B for transmission to the output. When the data select (S) input is 0, the odd-numbered AND gates are masked keeping their output low regardless of the logic state of B. The even-numbered AND gates, on the other hand, follow the logic state of A. Therefore B is blocked while A is allowed to be transmitted. When S is 1, A is blocked while B is transmitted.