D Flipflop
0
Favorite
0
Copy
278
Views
Circuit Description
Circuit Graph
The output signals always start in undetermined state but this will be removed by the subsequent rising edge of the clock (CLK) input where the state of the D input and its complement replace Q and NOTQ respectively.
Creator
nazia
82 Circuits
Date Created
3 years, 6 months ago
Last Modified
3 years, 6 months ago
Tags
This circuit has no tags currently.
Circuit Copied From
Open Circuit
✕Circuit Graph
✕
There are currently no comments