Register with Parallel Load using d flip flop by Izteleu Anuar

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Register with Parallel Load using d flip flop by Izteleu Anuar

Circuit Description

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I have built a circuit of a 4 bit register with a parallel load. If all bits of the register are loaded at the same time, the loading is done in parallel. Above is a 4 bit register with a load control input. Parallel-loaded registers are a type of register in which the individual bit values in the register are loaded simultaneously. More specifically, each flip-flop inside the register accepts an external data input, and these inputs are loaded into the flip-flops on the same edge in a clock cycle. The Load input determines the action to be performed at each clock pulse. Feedback communication from output to input is necessary because the D-flip-flop has no "no change" state.

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Register with Parallel Load using d flip flop by Izteleu Anuar

jnanesh12

Creator

AnuarIzteleu

8 Circuits

Date Created

2 years, 9 months ago

Last Modified

2 years, 9 months ago

Tags

  • d flip-flop
  • binary counter

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