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CMOS inverter and probed output

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Circuit Description

The NMOS transistor has an input from Vss (ground) and PMOS transistor has an input from Vdd. The terminal Y is output. When a high voltage (~ Vdd) is given at input terminal of the inverter, the PMOS becomes open circuit and NMOS switched OFF so the output will be pulled down to Vss.

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CMOS inverter and probed output

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Copy of CMOS inverter and probed output

kesari30

Copy of CMOS inverter and probed output

user-31691

Creator

chekwoti

8 Circuits

Date Created

5 years ago

Last Modified

5 years ago

Circuit Copied From

CMOS inverter

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CMOS inverter and probed output

Circuit Description

CMOS inverter and probed output

CMOS inverter

CMOS inverter and probed output

CMOS inverter and probed output

CMOS inverter

CMOS inverter

CMOS inverter and probed output

CMOS inverter

CMOS inverter and probed output

Copy of CMOS inverter and probed output

Copy of CMOS inverter and probed output

Creator

chekwoti

Date Created

Last Modified

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