*It is used as entry stage in the most of operational amplifiers;
*It eliminates the need for bypass capacitors;
*That is composed by 2 stages common emitter amplifiers in parallel with a common emitter resistor;
*There is no lower cutoff frequency;
*Vout is defined as: Vout = VC2 - VC1;
*When V1 > V2: Vout > 0;
*When V1 < V2: Vout < 0;
*The output voltage equation is:
Vout = Av(V1 - V2)
Av is the voltage gain
V1 is non-inverting input
V2 is inverting input
*When V2 = 0:
Vout = Av(V1);
*When V1 = 0:
Vout = -Av(V2);
*The voltage gain is defined as:
Av = (RC/r'e)
RC is the collector resistor value (RC=RC1=RC2)
r'e = 25mV/IE (B-E junction resistance)
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