Multiplexer / Data Selector

0
Favorite
11
copy
Copy
3310
Views
Multiplexer / Data Selector

Circuit Description

Graph image for Multiplexer / Data Selector

Circuit Graph

The circuit switches the two input data A and B for transmission to the output. When the data select (S) input is 0, the upper AND gate is masked, its output is 0 regardless of the logic state of B. The lower AND gate, on the other hand, will follow the logic state of A. Therefore B is blocked while A is allowed to be transmitted. When S is 1, A is blocked while B is transmitted.

There are currently no comments

Profile image for makarya12

2to1 multiplexer

makarya12
Profile image for insaanimanav

Multiplexer / Data Selector

insaanimanav
Profile image for KEERTHANA_335

Multiplexer / Data Selector

KEERTHANA_335
Profile image for keshavg1209

Mux using gates2X1

keshavg1209
Profile image for TaliaS13

Multiplexer ;)

TaliaS13
Profile image for Amna.Khan

Multiplexer / Data Selector

Amna.Khan
Profile image for harshithak

Multiplexer / Data Selector

harshithak
Profile image for joao.esv

Multiplexer / Data Selector

joao.esv
Profile image for SpinelliAndrea

Multiplexer

SpinelliAndrea
Profile image for FOSA

Copy of Multiplexer / Data Selector

FOSA
Profile image for private copy

Private Copy

Creator

GGoodwin

1116 Circuits

Date Created

6 years, 3 months ago

Last Modified

2 years, 8 months ago

Tags

  • multiplexer
  • mux
  • data selector
  • data switch