7-Input Majority Voting Logic (2-3-2 Splitting)

This is a seven-input majority voting logic implemented by first splitting the input variables into three groups. The first group consists of the first two input variables A and B. The second group consists of the input variables C, D, and E. The third group consists of the remaining two variables F and G. The logic used to arrive at this circuit is similar to that used in my circuit "Five-Input Majority Voting Logic (3-2 Splitting)". A fully working circuit, however, needs 19 logic gates. Since the circuit also require 7 digital input sources, the total component count of 26 will exceed the Free Subscription version of Multisim Live's components per circuit limit of 25. Consequently, one logic gate was omitted from the functional circuit. On the other hand the logic gate omitted was chosen so that its side effect will be minimal. The result is that the circuit will produce an erroneous output for the saved digital input values. That is, the output is logic LOW when it is evident that is should be HIGH. For all other 127 values, the circuit is expected to run properly.